(a) Field of the invention
The present invention relates to circuit arrangement of integrated logic, and more particularly it concerns monolithic semiconductor integrated circuit arrangement which performs high-speed logic behavior with small power dissipation.
(b) Description of prior art
Circuit systems which have been proposed in the past for monolithic semiconductor logic circuit arrangements, include resistor-transistor logic (RTL), diode-transistor logic (DTL), transistor-transistor logic (TTL), emitter-coupled logic (ECL) and like logics. Recently, however, emitter-follower logic (EFL) and integrated injection logic (IIL) are attracting the attention of those concerned in the semiconductor field. These logic circuits are composed mainly of bipolar type elements, and such circuits are divided into the following two general categories, i.e. saturating type and non-saturating type, depending on the manner of their behavior.
A saturated type logic circuit, in general, is disadvantageous in that its operating speed is limited due to the inherent effect of so-called minority carrier storage. On the other hand, such disadvantage is not present in logic circuits of the non-saturating type. However, non-saturating type logic circuits have an inherent problem in that power dissipation is relatively great.
Furthermore, those logic circuits mentioned above, excepting IIL circuit, provided for only relatively low integration density.